The present invention relates to an emitter coupled logic (ECL) circuit and, more particularly, to an emitter follower circuit in which power consumption is reduced and which operates at a high speed.
An emitter follower circuit has low output impedance and has high driving capability so that such circuit is widely used as an output stage for an emitter coupled logic circuit (hereinafter referred to as "ECL" circuit). Conventionally, it has been general that an emitter follower circuit is formed between a ground potential source and a negative potential source VEE (-4.5 V or -5.2 V) with the use of an emitter follower transistor and a terminating load resistor. However, a trend in recent years is that, instead of the terminal resistor, a pull-down transistor is used and further a capacitor is used for an emitter follower circuit in which an operating speed at the falling of an output is improved. In such conventional ECL circuit, because the emitter follower is terminated to the power source through the pull-down transistor, one of the problems is that the power consumption is large. Configuration of such conventional ECL circuit and various problems existing therein are fully explained later before the present invention is described.